It will be a basic Python app, functional, but no bells and whistles. Unfortunately, many minds are pressing in, and it’s hard to work. Writing SDU should resume late tonight. Being pinned a tail on as the donkey, I doubt many will appreciate my efforts.
More westerners going mad, spurred on by the Liew witches they befriended. I wonder what happened to these once Christian nations?
Closing in on noon. Some small issues with n4s. I wonder if simulation output data can be kept and applied to a second stage? AI says it’s possible with numpy, which is fortunate.
Simulation almost runs except I need to change the node names so they don’t conflict with ngSpice which is the backend module I’m using. May take an hour to finish altering my code to use just underscores and no dots etc.
Taking a while. I have to define circuit.in, gnd, and out for the simulation to run. Then tonight, to link up 2 circuits and release n4s v0.1 at last. Not sure if I will do SDU today. No rush, tho.
Finally managed to simulate the circuit but something went wrong in the node generation (again) and the graph is poor, unlike the example I used for reference. Almost 9pm. I think I will write tomorrow, just debug tonight. I do want to release it circa 3am tonight.
Past 10pm, I have solved the circuit issue. Was just careless with quotes and missed a kOhm in a typo. Still have to track down the R1 going behind C1. That’s really weird to happen after all the precautions I took. Looks like I will wrap that up by midnight. Want to do stage 2 now. Test a second stage which I’ll scrounge from somewhere.
The second stage is in place to sim after midnight. Now am assembling a team to fight the Liew armies. And, early results are in, we are victorious as one church, one people under God, if you are Moslem or otherwise.
Now 11pm. Thinking of a light supper, then work out. Brush. Meds at midnight.
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1am, worked out and brushed. Take my meds soon. Had raw garlic in olive oil and soy with an instant vegan noodle for supper. I have been polishing up net4spice and am testing a second stage input-output. The node error earlier was not caused by faulty logic, but in failure to implement the algorithm fully -to encompass all the components sharing a junction -even the transistor. Looks like this will spill over to tomorrow morning when I implement a Numpy data store-release interface. Looks simple enough.
We broke up the violent and deceiving telepathy group led by LiLian and her army of witches. Not sure if it will hold. Trying to make it a win-win situation for all. And I am giving up some time to help it along.
2am and I am turning in shortly. Allen is still angry with America despite living there and working a business of his own.
3am, I copied the numpy code from Google AI as I have no idea how to use numpy and just wedged it into n4s. It should work come tomorrow. Barely able to write as it's time for bed yet again.
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Some setbacks. There are serious bugs in my code that cause sporadic errors. Am looking at it again. Simplifying then build it up fully again to see where I went wrong.
Also got a fresh tennis racket grip from Decathlon. 39RM, not cheap, but much more durable as it is leather. There is a line where I work at a tennis academy. Sports and music will still be big after the troubles subside and God takes over. I am quite good at DiZi flute and also at racket sports. My specialty is playing chord-like notes on the DiZi, as I have good ears, giving students basic pointers on tennis as I am observant, having taken some lessons before.
Other lines involve me being around the coast, working in tourist entertainment. I could also be among people involved in rebuilding the world economy from a small office here in PJ.
This is an old prophecy of ‘Fruits of the Loom’. My racket stringbed is ‘loomed’ / woven, and in Chinese, we say ‘Flutes of the Room’ of which I have one DiZi. In some way, I will have food and a place to stay -so the Lord blessed me.
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Been thinking of nodes. If a ComponentX is at rXc1, we have to check for all c1 that enters any CompZ
So c1 cX cZ are clumped.
If ComponentX is at rXc2 or c3, we have to check for all c2/3 that exits any CompZ
So c2/3 cX and cZ are clumped.
If say a 4 component junction exists, then we will have to do 2 passes over it to form the node. Or any other node.
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